TL;DR
Virtual Protocol Architect: Develop product features for electronics industry leaders to verify designs and co-develop target AVIPs using Palladium and Protium hardware emulators with an accent on Accelerated Verification IP product lines. Focus on architecting performance verification solutions, solving hardware/software co-development challenges across hyperscale, AI computing, mobile, automotive, and aerospace industries.
Location: GYEONGGI-DO (Seoul), South Korea
Company
Cadence hires and develops leaders and innovators impacting technology in electronic design verification and hardware emulation.
What you will do
- Analyze customer requirements and map to product feature enhancements.
- Implement product features using RTL and C++ within existing codebase.
- Write unit and feature tests for developed features.
- Review code and implementation approaches from team members.
- Collaborate cross-functionally to ensure quality and timely delivery of product features.
- Architect performance verification solutions deployed worldwide.
Requirements
- Bachelor's with 16+ years, Master's with 14+ years, or PhD with 10+ years experience.
- Strong English verbal and written communication skills.
- Strong software engineering skills in C++/C and modern source control.
- Experience with hardware communication protocols like AMBA (CHI, AXI, ACE) and GUI framework tools.
- Preferred experience with SystemVerilog HDL and simulation/emulation technology.
- Must be located in or near GYEONGGI-DO (Seoul), South Korea.
Culture & Benefits
- Work as part of a locally based team with global collaboration.
- Opportunity to innovate in cutting-edge electronic design verification.