TL;DR

RF Analog Layout Design Engineer (Silicon Engineering): Responsible for the physical implementation of RF and Analog designs for communications platforms with an accent on chip-level floor planning and stringent area constraints. Focus on debugging complex verification issues such as DRC and LVS, and applying deep knowledge of fabrication processes to ensure high-performance transceiver reliability.

Location: Must be based in Israel (Haifa or Petah-Tikva). The role requires an on-site presence with flexibility to work between these two sites.

Company

A global leader in silicon and platform solutions, delivering next-generation computing and communication experiences.

What you will do

  • Execute top-level chip and block-level floor planning and analysis.
  • Conduct physical implementation of RF and analog designs for innovative communications products.
  • Analyze floor plan options considering design constraints, area budgets, and schedule requirements.
  • Perform verification of designs including addressing DRC, LVS, and DFM challenges.
  • Collaborate within a cross-functional, multi-site technical team on challenging RF transceiver development tasks.

Requirements

  • 5+ years of experience in RF layout design for RX, TX, and VCO circuits.
  • Deep expertise in Cadence Virtuoso IC6 and Mentor Calibre verification tools.
  • Strong background in layout theory, including transistor workflows and silicon cross-section knowledge.
  • Proven experience with analog layout designs such as DAC, ADC, differential OP amps, and baseband filters.
  • Excellent English communications: written and verbal.
  • Must be based in Israel with the ability to work on-site in Haifa and Petah-Tikva.

Culture & Benefits

  • Opportunity to gain broad insight into leading-edge communications products.
  • Work in a dynamic, cross-functional environment with industry experts.
  • Focus on technical career growth and tackling complex design challenges.
  • Participation in a leading-edge silicon development group.