TL;DR
Front End Design Engineer Intern (Embedded/IoT): Contributing to the Logic Design Team for Xtensa processors with an accent on architectural design and verification. Focus on utilizing Verilog/SystemVerilog and EDA tools to support the development of high-performance processor cores for intelligent IoT and AI applications.
Location: Onsite in Austin, TX or San Jose, CA.
Company
A global leader in computational software, semiconductor design IP, and system verification hardware.
What you will do
- Contribute as a member of the Logic Design Team for Xtensa processors.
- Apply knowledge of computer architecture to develop and verify pipelined designs.
- Utilize EDA simulation and implementation tools for hardware development.
- Collaborate with R&D teams to advance processor core capabilities.
- Develop and maintain automation scripts using languages like Perl.
Requirements
- Currently enrolled in MS or BS program in Electrical Engineering, Computer Engineering, or equivalent.
- Strong grasp of computer architecture and pipelined design principles.
- Solid proficiency in Verilog and SystemVerilog.
- Understanding of Digital Design and Design Verification fundamentals.
- Experience with scripting languages for engineering tasks.
- Excellent oral and written communication skills.
Nice to have
- Knowledge of compiler design and operating systems.
- Advanced proficiency in Perl scripting.
Culture & Benefits
- Opportunity to work at a world leader in semiconductor IP.
- Exposure to industry-standard EDA tools and methodologies.
- Collaboration with teams delivering technology for 5G, automotive, and AI markets.
- Impactful work experience on products shipping billions of cores annually.